Be Careful of Self and Mutual Inductance Formulae

Inductance has been identified as an emerging troublemaker of interconnects for the next generation high-speed digital VLSI design. As a result, accurate and fast inductance extraction is of crucial importance. Formulae-based partial inductance extraction method approaches have been widely adopted for inductance extraction due to its simplicity and efficiency. However, there are so many inductance formulae in the literature and there seems luck of detail comparisons of those formulae to check their accuracy and applicability. In this paper, we carefully compare several well-known partial self and mutual inductance formulae in details to check their range of applicability and validity. Since some formulae are originally derived for other applications where the parameter dimensions are quite different from the VLSI application, they are not numerically stable and accurate for all the concerned range of VLSI applications. As a result, carefulness must be deployed while applying those formulae.